Prashant Nair is an Assistant Professor at the University of British Columbia (UBC) where he advises an excellent group of students at the “Systems and Architectures (STAR) Lab”. Prior to joining UBC, he investigated practical data compression for IBM systems at T.J. Watson Research Center at New York. Dr. Nair’s work on integrating On-Die ECC and Host ECC has been successfully integrated into the HBM3 memory protocol by JEDEC – thereby improving the reliability of millions of memory devices.
Dr. Nair's interests are in the system-level and architecture-level optimization to enable efficient and practical quantum computers. He is also broadly interested in the areas of reliability, security, and performance-power efficient systems. He frequently publishes in several top-tier conferences computer science like ISCA, MICRO, HPCA, VLDB, DSN, and ASPLOS.